H100 SXM5 80GB
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SPECIFICATIONS
| Memory per accelerator | 80 GB HBM3 |
|---|---|
| Memory bandwidth | 3350 GB/s |
| Form factor | SXM5 module |
| Maximum accelerator power | 700 W |
Manufacturer specifications describe the product, not the condition of an offered unit. Checked 2026-09-08
COMPUTE SPECIFICATIONS
Manufacturer peak arithmetic per accelerator. These values do not predict application throughput or latency.
| Precision | Execution | Peak rate | Sparsity | Reference |
|---|---|---|---|---|
| FP64 | Vector | 34 TFLOPS | Dense | Source ↗ConditionsManufacturer peak per GPU; not sustained workload performance |
| FP64 | Tensor | 67 TFLOPS | Dense | Source ↗ConditionsManufacturer peak per GPU; not sustained workload performance |
| FP32 | Vector | 67 TFLOPS | Dense | Source ↗ConditionsManufacturer peak per GPU; not sustained workload performance |
| TF32 | Tensor | 989 TFLOPS | Structured sparse | Source ↗ConditionsManufacturer specification marked with sparsity; full GPU, not an NVL pair or MIG slice |
| BF16 | Tensor | 1979 TFLOPS | Structured sparse | Source ↗ConditionsManufacturer specification marked with sparsity; full GPU, not an NVL pair or MIG slice |
| FP16 | Tensor | 1979 TFLOPS | Structured sparse | Source ↗ConditionsManufacturer specification marked with sparsity; full GPU, not an NVL pair or MIG slice |
| FP8 | Tensor | 3958 TFLOPS | Structured sparse | Source ↗ConditionsManufacturer specification marked with sparsity; full GPU, not an NVL pair or MIG slice |
| INT8 | Tensor | 3958 TOPS | Structured sparse | Source ↗ConditionsManufacturer peak per GPU; not sustained workload performance |
- Peak arithmetic rates are not token throughput, latency or a guarantee of application performance
- Structured-sparse rates require eligible sparsity and supported kernels; do not compare them directly with dense rates
- Dense low-precision tensor rates are not derived by halving sparse ratings
PLATFORM AND SOFTWARE
- Requires a compatible SXM5 server baseboard and cooling assembly
- An SXM module does not install in a conventional PCIe slot
- Confirm CUDA, driver and framework compatibility against the intended server image
- Ask whether any software subscription can transfer with the particular used offer
Manufacturer maximum accelerator rating; actual draw and supported limits depend on system
INTERCONNECT
NVLink
900 GB/s. Manufacturer aggregate bidirectional bandwidth; topology depends on platform
PCIe Gen5 x16
128 GB/s. Theoretical aggregate bidirectional interface bandwidth
MANUFACTURER SOURCES
NVIDIA H100 specifications ↗NVIDIA · Checked 2026-09-08NVIDIA Hopper architecture in depth ↗NVIDIA · Checked 2026-09-08NVIDIA H100 datasheet ↗NVIDIA · Checked 2026-09-08HOW CARDINAL HELPS
Share your quantity, destination and server model, if known. We help turn those requirements into a clearly specified request.
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Any additional testing or guarantees must be agreed in the written offer.